module comparator_4bit (
    input [3:0] A,
    input [3:0] B,
    output reg A_gt_B,
    output reg A_eq_B,
    output reg A_lt_B
);

    always @(*) begin
        if (A > B) begin
            A_gt_B = 1;
            A_eq_B = 0;
            A_lt_B = 0;
        end
        else if (A == B) begin
            A_gt_B = 0;
            A_eq_B = 1;
            A_lt_B = 0;
        end
        else begin
            A_gt_B = 0;
            A_eq_B = 0;
            A_lt_B = 1;
        end
    end

endmodule

module tb_comparator_4bit;

    reg [3:0] A, B;
    wire A_gt_B, A_eq_B, A_lt_B;

    comparator_4bit uut (
        .A(A),
        .B(B),
        .A_gt_B(A_gt_B),
        .A_eq_B(A_eq_B),
        .A_lt_B(A_lt_B)
    );

    initial begin
        $display("Time\tA\tB\tA_gt_B\tA_eq_B\tA_lt_B");
        $monitor("%0t\t%b\t%b\t%b\t%b\t%b", $time, A, B, A_gt_B, A_eq_B, A_lt_B);
        
        A = 4'b0001; B = 4'b0010; #10;
        A = 4'b0100; B = 4'b0011; #10;
        A = 4'b1010; B = 4'b1010; #10;
        A = 4'b1111; B = 4'b0000; #10;
        A = 4'b0000; B = 4'b1111; #10;

        $finish;
    end

endmodule